期刊论文：

[1] Rongliang Fu, Minglei Zhou, Siyan Chen, Xinda Chen, Junying Huang*, Xiaochun Ye, Zhimin Zhang. "JPnR: A Length-Matching Placement and Routing Framework for Single-Flux-Quantum Circuits." IEEE Transactions on Computers (TC), 2025. (CCF A, accepted)

[2] Rongliang Fu, Ran Zhang, Ziyang Zheng, Zhengyuan Shi, Yuan Pu, Junying Huang*, Bei Yu, Qiang Xu, and Tsung-Yi Ho. "CHOP: Clustered Hybrid Optimization for Logic Synthesis with Self-Supervised Prediction." TCAD, 2025. (CCF A, accepted)

[3] Huilong Jiang, Zhongqi Wang, Junying Huang*, Gang Chen, Zhimin Zhang, Xiaochun Ye, Dongrui Fan, Lixing You. "JSNPE: A Digital Superconducting Spiking Neural Processing Element." IEEE Transactions on Applied Superconductivity, vol.35, no.4, pp.1-12, 2025.

[4] Zhiteng Chao, Feng Gu, Junying Huang, Wenjie Li, Jing Ye, Huawei Li, Xiaowei Li. Memory-efficient and adaptive heterogeneous framework for gate-level fault simulation. TODAES, pp.1-27.(CCF B)

[5] Fu, Rongliang, Junying Huang*, Haibin Wu, Xiaochun Ye, Dongrui Fan, and Tsung-Yi Ho. "JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits." IEEE Transactions on Computers(TC), vol.71, no.12 (2022): 3203-3214.(CCF A)

[6] Huang, Junying, Rongliang Fu, Xiaochun Ye, and Dongrui Fan. "A survey on superconducting computing technology: circuits, architectures and design tools." CCF THPC, vol.4, no.1 (2022): 1-22.(CCF C)

会议论文：

[1] Rongliang Fu, Ran Zhang, Ziyang Zheng, Zhengyuan Shi, Yuan Pu, Junying Huang*, Qiang Xu, Tsung-Yi Ho. "Late Breaking Results: Hybrid Logic Optimization with Predictive Self-Supervision." DAC 2025.(CCF A)

[2] Yang Su, Sheng Li, Huilong Jiang, Haofei Yin, Rongliang Fu, Junying Huang*, Xiaochun Ye, Zhimin Zhang, Jie Ren, Xiaoping Gao, Tsung-Yi Ho, Dongrui Fan. "JBSA: A Bit-Serial Accelerator for Deep Neural Networks Using Superconducting SFQ Logic." ICS 2025.(CCF B)

[3] Minglei Zhou, Rongliang Fu, Ran Zhang, Xiaochun Ye, Tsung-Yi Ho, Junying Huang*. "An Optimal DFF-Oriented Technology Legalization Algorithm for Rapid Single-Flux-Quantum Circuits." GLSVLSI 2025.(CCF C)

[4] Rongliang Fu, Minglei Zhou, Huilong Jiang, Junying Huang*, Xiaochun Ye, Tsung-Yi Ho. "J2Place: A Multiphase Clocking-Oriented Length-Matching Placement for Rapid Single-Flux-Quantum Circuits." ICCAD 2025.(CCF B)

[5] Rongliang Fu, Libo Shen, Ziyi Wang, Zhengxing Lei, Zixiao Wang, Junying Huang*, Bei Yu, Tsung-Yi Ho. "DCLOG: Don’t Cares-based Logic Optimization using Pre-training Graph Neural Networks." ASP-DAC 2026.(CCF C)

[6] Siyan Chen, Rongliang Fu, Junying Huang*, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan. "JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits," DATE 2024.(CCF B)

[7] Rongliang Fu, Junying Huang, Mengmeng Wang, Yoshikawa Nobuyuki, Bei Yu, Tsung-Yi Ho, Olivia Chen. "BOMIG: A Majority Logic Synthesis Framework for AQFP Logic." DATE 2023.(CCF B)

[8] Fu, Rongliang, Junying Huang, and Zhi-Min Zhang. "Equivalence Checking for Superconducting RSFQ Logic Circuits." GLSVLSI 2021.(CCF C, Best paper Nomination)

[9] Fu, Rongliang, Zhi-Min Zhang, Guang-Ming Tang, Junying Huang, Xiao-Chun Ye, Dong-Rui Fan, and Ning-Hui Sun. "Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic Circuits." GLSVLSI 2020.(CCF C)

发明专利：

[1]黄俊英;付荣亮;张志敏，一种超导二值神经网络加速方法及加速器，申请号：CN202210513312.7.

[2]黄俊英;付荣亮;张阔中;叶笑春;张志敏;范东睿，生成面向超导RSFQ电路的多扇出时钟信号的方法，申请号：CN202110446390.5

[3]黄俊英;张阔中;叶笑春;张志敏;范东睿，用于双时钟架构的超导RSFQ电路布局方法，申请号：CN202110442343.3

[4]黄俊英;付荣亮;张阔中;叶笑春;张志敏;范东睿，生成面向超导RSFQ电路的

多扇出时钟信号的方法，申请号：CN202010703091.0

[5]张阔中;黄俊英;张志敏;唐光明，基于超导异或门生成时钟信号的方法以及时钟发生器，申请号：CN202210048631.5

[6]张阔中;黄俊英;张志敏;唐光明，超导译码器装置，申请号： CN202110689803.2

[7]王中旗;黄俊英;张志敏;叶笑春;范东睿，跨平台光纤传输系统，申请号： CN202210764423.5

[8]王中旗;黄俊英;张志敏;叶笑春;范东睿，板间通信接口系统，申请号： CN202210764461.0

[9]王中旗;黄俊英;张志敏;叶笑春;范东睿，光纤通信转接系统，申请号： CN202210764499.8

[10]付荣亮;黄俊英;张阔中;唐光明;叶笑春;范东睿;张志敏，一种生成面向超导RSFQ电路的多扇出信号的方法，申请号： CN202010709748.4

[11]张阔中;黄俊英;张志敏;唐光明，超导寄存器堆装置及其控制方法，申请号： CN202110439614.X

[12]王中旗;张志轩;黄俊英;张志敏;叶笑春;范东睿，针对低温多芯片计算系统的模拟方法及其系统，申请号： CN202210880357.8

[13]张阔中;张志敏;唐光明;黄俊英，超导脉冲计数器，申请号： CN202210598684.4

[14]张志敏;唐光明;张阔中;黄俊英;付荣亮;叶笑春;范东睿，一种超导流水线电路及处理器，申请号： CN202010875646.X

[15]张志敏;唐光明;张阔中;黄俊英;付荣亮;叶笑春;范东睿，一种超导并行寄存器堆装置，申请号： CN202010876462.5

[16]张阔中;张志敏;唐光明;黄俊英;付荣亮;叶笑春;范东睿，超导处理器及其输入输出控制模块，申请号： CN202110266205.4

[1]计算机体系结构国家重点实验室创新项目: 优化温度分布的三维FPGA布局方法研究，2017.01-2018.12，项目负责人；

[2]北京市优秀人才培养青年骨干个人项目：硅前硬件木马检测方法研究，2018.01-2020.12，项目负责人；

[3]中科院战略性先导科技专项（A类）项目子课题: 超导计算机原理样机设计与集成，2018.01-2023.12，主要参与人；

[4]国家自然科学基金青年项目：位串行超导单磁通量子神经网络加速器结构研究，2024.1-2026.12，项目负责人。